MIL-M-38510/371B
1. Clear and preset inputs dominate regardless of the state of clock or J-K inputs.
2. Clear and preset input pulse characteristics: t1 = t0 = 6 ±1.5 ns; tp ( clear ) = 15 ns;
tp ( preset ) = 15 ns; and PRR ≤ 1 MHz.
3. tp (clock) = 16.5 ns min; PRR = same as clear and preset.
4. CL = 50 pF ±10% (including jig and probe capacitance without package in test fixture).
5. RL = 499ν ±1%.
6. When testing clear to output switching, preset input shall have a logical "1" voltage
applied. When testing preset to output switching, clear input shall have a logical "1" voltage applied (see table III).
7. Voltage measurements are to be made with respect to network ground terminal.
FIGURE 4. Clear and preset switching test circuit and waveforms (device type 02).
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