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MIL-M-38510-190 Microcircuits, Linear, Cmos/Analog Multiplexers/Demultiplexers With Overvoltage Protection, Monolithic Silicon, Positive LogicThis specification covers the detail requirements for monolithic silicon, CMOS/Analog logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

Pages 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 10 - 11 - 12 - 13 - 14 - 15 - 16 - 17 - 18 - 19 - 20 - 21 - 22 - 23 - 24 - 25 - 26 - 27 - 28 - 29 - 30 - 31 - 32 - 33 - 34 - 35 - 36 - 37 - 38 - 39 - 40 - 41 - 42 - 43 - 44 - 45 - 46 - 47 - 48 - 49 - 50 - 51 - 52 - 53 - 54 - 55 - 56 - 57 - 58 - 59 - 60 - 61 - 62 - 63 - 64 - 65 - 66 - 67 - 68 - 69 - 70 - 71 - 72 - 73 - 74 - 75 - 76 - 77 - 78 - 79 - 80 - 81 - 82 - 83 - 84


TABLE III.  Group A inspection for device type 08 - Continued.



Symbol


MIL- STD-883 test method


Case

E


Terminal conditions  11


Measured

Terminal


Test limits


Unit

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

Subgroup 9

TA  = 25°C

Subgroup 10

TA  = 125°C

Subgroup 11

TA  = -55°C

Test

no.

A0

EN

V-

IN1A

IN2A

IN3A

IN4A

OUTA

OUTB

IN4B

IN3B

IN2B

IN1B

V+

GND

A1

Min

Max

Min

Max

Min

Max

tON(A)

and

tOFF(A)

3003

92

_1¯

5 V

-15 V

GND

GND

GND

10 V

OUT

GND

GND

GND

GND

15 V

GND

_1¯

ADDRESS IN

TO OUTA

1,000

1,500

1,000

ns

fig. 12

93

_1¯

"

"

"

"

"

-10 V

"

"

"

"

"

"

"

_1¯

"

"

"

"

"

94

¯\_

"

"

"

"

"

10 V

"

"

"

"

"

"

"

¯\_

"

"

"

"

"

"

95

¯\_

"

"

"

"

"

-10 V

"

"

"

"

"

"

"

¯\_

"

"

"

"

"

"

96

_1¯

"

"

10 V

"

"

GND

"

"

"

"

"

"

"

_1¯

"

"

"

"

"

"

97

_1¯

"

"

-10 V

"

"

"

"

"

"

"

"

"

"

_1¯

"

"

"

"

"

"

98

¯\_

"

"

10 V

"

"

"

"

"

"

"

"

"

"

¯\_

"

"

"

"

"

"

99

¯\_

"

"

-10 V

"

"

"

"

"

"

"

"

"

"

¯\_

"

"

"

"

"

"

100

_1¯

"

"

GND

"

"

"

OUT

10 V

"

"

"

"

"

_1¯

ADDRESS IN

"

"

"

"

"

101

_1¯

"

"

"

"

"

"

"

-10 V

"

"

"

"

"

_1¯

TO OUTB

"

"

"

"

"

102

¯\_

"

"

"

"

"

"

"

10 V

"

"

"

"

"

¯\_

"

"

"

"

"

"

103

¯\_

"

"

"

"

"

"

"

-10 V

"

"

"

"

"

¯\_

"

"

"

"

"

"

104

_1¯

"

"

"

"

"

"

"

GND

"

"

10 V

"

"

_1¯

"

"

"

"

"

"

105

_1¯

"

"

"

"

"

"

"

"

"

"

-10 V

"

"

_1¯

"

"

"

"

"

"

106

¯\_

"

"

"

"

"

"

"

"

"

"

10 V

"

"

¯\_

"

"

"

"

"

"

107

¯\_

"

"

"

"

"

"

"

"

"

"

-10 V

"

"

¯\_

"

"

"

"

"

tON(EN)

and

tOFF(EN)

fig. 13

108

GND

_1¯

"

10 V

10 V

10 V

10 V

OUT

"

"

"

GND

"

"

GND

ENABLE

"

"

"

"

"

109

"

_1¯

"

-10 V

-10 V

-10 V

-10 V

"

"

"

"

"

"

"

"

TO OUTA

"

"

"

"

"

110

"

¯\_

"

10 V

10 V

10 V

10 V

"

"

"

"

"

"

"

"

"

"

"

"

"

"

111

"

¯\_

"

-10 V

-10 V

-10 V

-10 V

"

"

"

"

"

"

"

"

"

"

"

"

"

"

112

"

_1¯

"

GND

GND

GND

GND

OUT

10 V

10 V

10 V

10 V

"

"

"

ENABLE

"

"

"

"

"

113

"

_1¯

"

"

"

"

"

"

-10 V

-10 V

-10 V

-10 V

"

"

"

TO OUTB

"

"

"

"

"

114

"

¯\_

"

"

"

"

"

"

10 V

10 V

10 V

10 V

"

"

"

"

"

"

"

"

"

115

"

¯\_

"

"

"

"

"

"

-10 V

-10 V

-10 V

-10 V

"

"

"

"

"

"

"

"

Subgroup 12

TA  = 25°C

Min

Max

VISO

fig. 15

116

GND

0 V

-15 V

IN

IN

IN

IN

OUT

IN

IN

IN

IN

15 V

GND

GND

OUTA

50

dB

fig. 15

117

"

0 V

"

"

"

"

"

OUT

"

"

"

"

"

"

"

OUTB

"

"

VCT

fig. 16

118

"

5 V

"

61

"

"

"

OUT

"

"

"

61

"

"

"

OUTA

"

"

fig. 16

119

"

"

"

61

"

"

"

OUT

"

"

"

61

"

"

"

OUTB

"

"

VCTE

fig. 17

120

IN

"

"

GND

OUT

GND

"

"

IN

OUTA

10

mV

fig. 17

121

IN

"

"

GND

OUT

GND

"

"

IN

OUTB

10

Subgroup 13

TA  = 25°C

Min

Max

tD

fig. 14

122

_1¯

5 V

-15 V

10 V

10 V

10 V

10 V

OUT

GND

GND

GND

GND

15 V

GND

IN

OUTA

5

ns

"

123

_1¯

"

"

-10 V

-10 V

-10 V

-10 V

"

"

"

"

"

"

"

"

"

"

"

"

124

¯\_

"

"

10 V

10 V

10 V

10 V

"

"

"

"

"

"

"

"

"

"

"

"

125

¯\_

"

"

-10 V

-10 V

-10 V

-10 V

"

"

"

"

"

"

"

"

"

"

"

"

126

_1¯

"

"

GND

GND

GND

GND

OUT

10 V

10 V

10 V

10 V

"

"

"

OUTB

"

"

"

127

_1¯

"

"

"

"

"

"

"

-10 V

-10 V

-10 V

-10 V

"

"

"

"

"

"

"

128

¯\_

"

"

"

"

"

"

"

10 V

10 V

10 V

10 V

"

"

"

"

"

"

"

129

¯\_

"

"

"

"

"

"

"

-10 V

-10 V

-10 V

-10 V

"

"

"

"

"

"


11  Pins not designated may be high-level logic or open.  Exceptions are as follows: VIC(POS)  tests, the V-, GND terminal shall be open; VIC(NEG)  tests, the V+

terminal shall be open.

21  The device manufacturer may, at his option, measure IIL and IIH  at 25°C for each individual input or measure all inputs together.

31  The IS  and ID  measurements shall be performed in sequence.

41  CA, CEN, and CIS  - Connect capacitance bridge between measured terminal and VSS, frequency = 1 MHz, see 4.4.1c.

51  COS  - Connect capacitance bridge between measured output and VSS, frequency = 1 MHz, see 4.4.1c.

61  Connect input to ground through a 1 kn ±5% resistor.






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