MIL-M-38510-190 Microcircuits, Linear, Cmos/Analog Multiplexers/Demultiplexers With Overvoltage Protection, Monolithic Silicon, Positive LogicThis specification covers the detail requirements for monolithic silicon, CMOS/Analog logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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Test

Symbol

Conditions  1/  2/

V- = -15 V, V+ = +15 V, VEN  = 4.5 V, GND = 0 V,

-55°C ≤ TA  ≤ +125°C

unless otherwise specified

Device type

Limits

Unit

Min

Max

Switch "ON" resistance

RDS2

V+ = 10 V, V- = -10 V, VS  = 7.5 V, ID = 1 mA

01, 03,

07, 08

1,000

n

V+ = 10 V, V- = -10 V, VS  = 7.5 V, ID = 100 µA

02, 04

2,400

05, 06

2,200

V+ = 10 V, V- = -10 V, VS  = -7.5 V, ID = -1 mA

01, 03,

07, 08

1,000

V+ = 10 V, V- = -10 V,

VS  = -7.5 V, ID = -100 µA

02, 04

2,400

05, 06

2,200

Single channel isolation

VISO

f = 200 kHz, VGEN  = 1 VP-P, see figure 15

All

50

dB

Crosstalk between channels

VCT

F = 200 kHz, VGEN  = 1 VP-P, see figure 16

All

50

dB

Charge transfer error

VCTE

VS  = GND, see figure 17

All

10

mV

Break-before-make time delay

tD

See figure 14, TA  = 25°C

All

5

ns

Propagation delay times:  Address inputs to I/O channels

tON(A)

tOFF(A)

RL  = 1 kn, CL = 100 pF, see figures 6, 8, 10, and

12, TA = 25°C, TA  = -55°C

All

1,000

ns

RL  = 1 kn, CL = 100 pF, see figures 6, 8, 10, and

12, TA = 125°C

1,500

Enable to I/O

tON(EN)

tOFF(EN)

RL  = 1 kn, CL = 100 pF, see figures 7, 9, 11, and

13, TA = 25°C, TA  = -55°C

All

1,000

ns

RL  = 1 kn, CL = 100 pF, see figures 7, 9, 11, and

13, TA = 125°C

1,500