MIL-M-38510-174 Microcircuits, Digital, CMOS, Inverter, NAND Buffer Driver, Strobed Hex Inverter/Buffer, Voltage Level Shifter, Monolithic Silicon, Positive LogicThis specification covers the detail requirements for monolithic silicon, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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Symbol

MIL-

STD-883 method

Cases

E,F,N,Z

Terminal conditions 1/

Measured

terminal

Test limits

Units

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

Subgroup 9

TA  = 25°C

Subgroup 10

TA  = 125°C

Subgroup 11

TA  = -55°C

Symbol

D3

Q3

D1

Dis.

Q1

D2

Q2

VSS

Q4

D4

Q5

I

D5

Q6

D6

VDD

Test No.

Min

Max

Min

Max

Min

Max

tPHZ

5/

" " " "

Fig. 4 "

" "

" "

223

224

225

226

227

228

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GND "

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5.0V "

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Dis to Q1

Dis to Q2

Dis to Q3

Dis to Q4

Dis to Q5

Dis to Q6

6 "

" "

" "

120 "

" "

" "

9 "

" "

" "

170 "

" "

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6 "

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120 "

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229

230

231

232

233

234

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11

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220

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16

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310

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235

236

237

238

239

240

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Dis to Q1

Dis to Q2

Dis to Q3

Dis to Q4

Dis to Q5

Dis to Q6

13

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250

" " " " "

18

" " " " "

350

" " " " "

13

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250

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241

242

243

244

245

246

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Dis to Q6

"

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"

" " " " "

"

" " " " "

"

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"

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Subgroup 12

TA  = 25°C

Min

Max

tPHL

"

" " " " " " " " " "

3003

Fig. 4 "

"

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" " " " "

247

248

249

250

251

252

253

254

255

256

257

258

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I to Q1

I to Q2

I to Q3

I to Q4

I to Q5

I to Q6

D1 to Q1

D2 to Q2

D3 to Q3

D4 to Q4

D5 to Q5

D6 to Q6

6 "

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3003

Fig. 4 "

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259

260

261

262

263

264

265

266

267

268

269

270

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I to Q4

I to Q5

I to Q6

D1 to Q1

D2 to Q2

D3 to Q3

D4 to Q4

D5 to Q5

D6 to Q6

9 "

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180 "

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