MIL-M-38510-174 Microcircuits, Digital, CMOS, Inverter, NAND Buffer Driver, Strobed Hex Inverter/Buffer, Voltage Level Shifter, Monolithic Silicon, Positive LogicThis specification covers the detail requirements for monolithic silicon, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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MIL-M-38510/1748

TA8LE I. Electrical performance characteristics - Continued.

Test	Symbol	Conditions 1/ VSS = 0 V -55°C = TA = +125°C Unless otherwise specified		Device type	Limits		Unit
					Min	Max
Output high (source) current	IOH1	VDD = 5 V VIN = VSS VOH = 4.6 V		01, 03	-0.36		mA
	IOH2	VDD = 15 V VOH = 13.5 V	VIN = VSS	01,03	-2.4
			VIN = VDD	04
Output low (sink) current	IOL1	VDD = 5 V VOL = 0.4 V	VIN = VDD	02	12.0		mA
				01	0.36
			VIN = VSS	03
	IOL2	VDD = 15V VOL = 1.5 V	VIN = VDD	02	80.0		mA
				01	2.4
				04
			VIN = VSS	03
Input leakage current, high 2/	IIH	VDD = 18 V Measure inputs sequentially Connect all unused inputs to VSS		01, 03	100		nA
				02, 04	45
Input leakage current, low 2/	IIL	VDD = 18 V Measure inputs sequentially Connect all unused inputs to VDD		01, 03	-100		nA
				02, 04	-45
Input capacitance	CIN	VDD = 0 V, f = 1 MHz, TA = 25°C		01		12.0	pF
				02, 03, 04		7.5	pF
Three-state output leakage current	IOC1	VDD = 18 V Measure outputs sequentially VO = VDD		03		90	nA
				04		90
	IOC2	VDD = 18 V Measure outputs sequentially VO = VSS		03		-90	nA
				04		-90
Propagation delay time, high-to-low level	tPHL	VDD = 5.0 V CL = 50 pF RL = 200 kO (see figure 4)		01	5	155	ns
				02	10	280
				03	14	380
				04	30	840
Propagation delay time, low-to-high level	tPLH	VDD = 5.0 V CL = 50 pF RL = 200 kO (see figure 4)		01	5	155	ns
				02	10	280
				03	19	535
				04	13	365

See footnotes at end of table.