MIL-M-38510-174 Microcircuits, Digital, CMOS, Inverter, NAND Buffer Driver, Strobed Hex Inverter/Buffer, Voltage Level Shifter, Monolithic Silicon, Positive LogicThis specification covers the detail requirements for monolithic silicon, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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Test

Symbol

Conditions   1/

VSS = 0 V

-55°C = TA = +125°C Unless otherwise specified

Device type

Limits

Unit

Min

Max

Positive clamping input

to VDD

VIC (POS)

TA = +25°C, VDD  = GND

VSS = Open, Output = Open

IIN  = 1 mA

01, 02,

03

1.5

V dc

Negative clamping input

to VSS

VIC (NEG)

TA = +25°C, VDD  = Open VSS = GND, Output = Open IIN  = -1 mA

All

-6.0

V dc

Quiescent supply current

ISS or

IDD

VDD  = 18 V dc

VIN  = VSS or VDD

All input combinations

All

-750

nA

High level output voltage

VOH1

VDD  = 15 V dc

IO  = 1∝A

Any one input = VSS

All other inputs = VDD

01

14.95

V dc

VIN  = VSS

03

VIN  = VDD

04

Low level output voltage

VOL1

VDD  = 15 V dc

IO  = 1∝A

Any one input = VDD

All other inputs = VSS

01

0.05

V dc

VIN  = VDD

02, 03

All enables = VDD

All other inputs = VSS

04

Input high voltage

VIH1

VDD  = 5 V dc See table III IO  = 1∝A

All

3.5

V dc

VIH2

VDD  = 10 V dc

See table III

IO  = 1∝A

All

7.0

V dc

VIH3

VDD  = 15 V dc

See table III

IO  = 1∝A

All

11.0

V dc

Input low voltage

VIL1

VDD  = 5 V See table III IO  = 1 ∝A

All

1.5

V

VIL2

VDD  = 10 V See table III IO  = 1 ∝A

All

3.0

V

VIL3

VDD  = 15 V See table III IO  = 1 ∝A

All

4.0

V