MIL-M-38510-765 Microcircuits, Digital, Advanced Cmos, Shift Registers, Monolithic Silicon, Positive LogicThis specification covers the detail requirements for monolithic silicon, advanced CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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MIL-M-38510/765A

TABLE I. Electrical performance characteristics and postirradiation end-point electrical parameter limits - Continued.

4/ This parameter is provided as design information only.

5/ Postirradiation electrical measurements for any RHA level shall be performed at TA = +25°C. Limits shown are guaranteed at TA = +25°C ±5°C.

6/ Transmission driving tests are performed at VCC = 5.5 V dc with a 2 ms duration maximum.

7/ Not tested at -55°C.

8/ Three-state output conditions are required. For IOZL, set outputs to high state. For IOZH, set outputs to low state. Set input pins to VIL = VIL(MAX) and VIH = VIH(MIN), as required. IOZL and IOZH shall include IIL and IIH, respectively.

9/ Set output enable control pins to VCC or GND, as applicable, to disable the outputs.

10/ Power dissipation capacitance (CPD) determines the no load dynamic power consumption, PD = (CPD + CL) (VCC x VCC)f + (ICC x VCC) and the dynamic current consumption, IS = (CPD + CL)VCCf + ICC. For both CPD and IS, f is the frequency of the input signal.

11/ See EIA/JEDEC STD. No. 78 for electrically induced latch-up test methods and procedures. The values listed for Itrigger and

Vover are to be accurate within ±5 percent.

12/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth tables and other logic patterns used for fault detection. Functional tests shall be performed in sequence as approved by the qualifying activity on qualified devices. H � 2.5 V, L ≤ 2.5 V; high inputs = 3.7 V and low inputs = 0.6 V for VCC = 4.5 V and H �1.5 V,

L ≤ 1.5 V; high inputs = 2.5 V and low inputs = 0.45 V for VCC = 3.0 V. Tests at VCC = 3.0 V are for RHA specified devices only (TA = +25°C ±5°C).

13/ Device are tested at VCC = 3.0 V and VCC = 4.5 V at TC = +125°C for sample testing and at VCC = 3.0 V and VCC = 4.5 V at

TC = +25°C for screening. Other voltages of VCC and temperatures are guaranteed, if not tested. See 4.4.1d.

14/ AC limits at VCC = 5.5 V are equal to the limits at VCC = 4.5 V and guaranteed by testing at VCC = 4.5 V. Minimum ac limits

for VCC = 5.5 V are 1.0 ns and guaranteed by guardbanding the VCC = 4.5 V minimum limits to 1.5 ns. For propagation delay

tests, all paths must be tested.