MIL-M-38510-325 Microcircuits, Digital, Bipolar, Low-Power, Schottky Ttl, Flip-Flops, Cascadable, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, bipolar, low-power Schottky TTL, flip-flops, bistable logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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MIL-M-38510/3250

NOTES:

1.  Clock input pulse has the following characteristics: Vgen  = 3.0 ±0.2 V, tI � 15 ns, tO  � 6 ns, tP(clock) = 15 ns, PRR � 1 MHz.  When testing fMAX, PRR = see table III, and tO  = tI  � 6ns.

2.  0 input has the following characteristics: Vgen = 3.0 ±0.2 V, tI � 15 ns, tO  � 6 ns, tsetup  = 20 ns, thold = 5 ns, tP = 25 ns, and PRR is 50 percent of the clock PRR.  For fMAX, tO  = tI � 6 ns.

3.  All diodes are 1N3064 or equivalent.

4.  CL  = 50 pF ±10% (including probe and jig capacitance).

5.  The diode and resistor shown within the dotted area are optional.  When the diode and resistor are used, VBIAS

shall be 5.5 V for all tests except for tPHZ; for tPHZ  tests, VBIAS shall be -0.6 V.

6.   Switches S1 and S2 are closed for tPHL2, when using the alternate load circuit.

FIGURE 3.  Synchronous switching test circuit (high level data) for device type 03 - Continued.

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