MIL-M-38510-325 Microcircuits, Digital, Bipolar, Low-Power, Schottky Ttl, Flip-Flops, Cascadable, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, bipolar, low-power Schottky TTL, flip-flops, bistable logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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MIL-M-38510/325D

1.3  Absolute maximum ratings.

Supply voltage range  .............................................................................  -0.5 V dc to 7.0 V dc

Input voltage range  ................................................................................  -1.5 V dc at -18 mA to 5.5 V dc

Storage temperature range  ....................................................................  -65°C to +150°C Maximum power dissipation (PD)  1/

Device type 01  .................................................................................  149 mW

Device type 02 and 03 ......................................................................  231 mW Device type 04  .................................................................................  176 mW

Lead temperature (soldering, 10 seconds) .............................................  +300°C Thermal resistance, junction to case (eJC):

Cases R, S, and 2  ................................................................................  (See MIL-STD-1835)

Junction temperature (TJ)  2/ ..................................................................  +175°C

1.4  Recommended operating conditions.

Supply voltage (VCC)  ..............................................................................  4.5 V dc minimum to 5.5 V dc maximum

Minimum high level input voltage (VIH) ...................................................  2.0 V dc

Maximum low level input voltage (VIL) ....................................................  0.7 V dc

Case operating temperature range (TC)  .................................................  -55°C to +125°C

Normalized fanout (each output)  3/ .......................................................  10 maximum at low logic level

20 maximum at high logic level

Input setup time, t(setup):

Device type 01, 03  ...........................................................................  20 ns minimum

Device type 02  .................................................................................  5 ns minumum

Device type 04

data  ...............................................................................................  20 ns minimum enable active  .................................................................................  25 ns minimum

enable inactive  ..............................................................................  10 ns minimum

Input hold time, t(hold):

Device type 01, 03, 04 ......................................................................  5 ns minimum

Device type 02  .................................................................................  20 ns minimum

Input pulse width, tP:

Device type 01, 04 (clock) ................................................................  20 ns minimum

Device type 01 (clear)  ......................................................................  20 ns minimum Device type 02 (enable)  ...................................................................  15 ns minimum Device type 03 (clock) ......................................................................  15 ns minimum

1/  Must withstand the added PD  due to short-circuit test (e.g., IOS).

2/  Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening

conditions in accordance with MIL-PRF-38535.

3/  Device will fanout in both high and low levels to the specified number of data inputs on the same device as that being tested.

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