MIL-M-38510-172 Microcircuits, Digital, Cmos, And-Or-Invert, Exclusive-Or, Exclusive-Nor Gates, Monolithic Silicon, Positive LogicThis specification covers the detail requirements for monolithic silicon, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance RHA are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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Line no.

MIL-PRF-38535 test requirements

Class S device  11

Class B device  11

Ref. par.

Table III Subgroups

21

Table IV

delta limits

31

Ref. par.

Table III

subgroups

21

Table IV

delta limits

31

1

Interim electrical parameters

1

1

2

Static burn-in I (method 1015)

4.2c

4.5.2

3

Same as line 1

1

4

Static burn-in II (method 1015)

4.2c

4.5.2

4.2c

4.5.2

41

5

Same as line 1

4.2e

1*

4.2e

1*

6

Dynamic burn-in

(method 1015)

4.2c

4.5.2

7

Same as line 1

4.2e

1*

8

Final electrical parameters

(method 5004)

1*, 2, 3, 9

1*, 2, 3, 9,

10, 11

9

Group A test requirements

(method 5005)

4.4.1

1, 2, 3, 4, 9,

10, 11, 12

4.4.1

1, 2, 3, 4, 9

10

Group B test when using

method 5005

QCI option

4.4.2

1, 2, 3, 9, 10,

11

11

Group C end- point electrical

parameters

(method 5005)

4.4.3

1, 2,3

12

Group D end- point electrical

parameters

(method 5005)

4.4.4

1, 2, 3

4.4.4

1, 2, 3