MIL-M-38510-384 Microcircuits, Digital, Bipolar, Advanced Low Power Schottky Ttl, And, Or, Nand And Nor Gates, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, advanced low power Schottky TTL, positive AND, OR, NAND, and NOR logic gating microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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TABLE III.  Group A inspection for device type 11, 12 - Continued.

Terminal conditions (pins not designated may be high � 2.0 v or low s 0.8 v or open).

1/  Pins not referenced are N/C.

2/  Device 11 only.

3/  IIL  limits shall be as follows:

4/  Method 3011 of MIL-STD-883 shall be used, except the output shall be as specified herein, and the output current shall be operating rather than short circuit current.

The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit output current, IOS.

5/  IO  min/max limit for circuits B and C shall be: -30/ -110 mA.

6/  Device 12 only.

7/  For device type 11; min = 1 ns, max = 8 ns.  For device type 12; min = 5 ns, max = 30 ns.

8/  For device type 11; min = 1 ns, max = 8 ns.  For device type 12; min = 2 ns, max = 12 ns.

9/  For device type 11; min = 1 ns, max = 10 ns.  For device type 12; min = 5 ns, max = 35 ns.

10/  For device type 11; min = 1 ns, max = 10 ns.  For device type 12; min = 2 ns, max = 14 ns.