MIL-M-38510/3728
NOTES:
1. Clear input dominates regardless of the state of clock or D inputs.
2. Q output applies to device type 02 only.
3. Clear input pulse characteristics: t1 = t0 = 6 ±1.5 ns; tP(CLEAR) = 15 ns; PRR � 1.0 MHz.
4. Inputs not under test are at ground.
5. CL = 50 pF ±10%, including scope probe, wiring, and stray capacitance without package in test fixture.
6. RL = 499n ±1%.
7. Clock input pulse characteristics: tP(CLK) � 12.5 ns, PRR � 1.0 MHz.
8. Voltage measurements are to be made with respect to network ground terminal.
FIGURE 4. A synchronous switching test circuit for device types 01 and 02.
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