MIL-M-38510-316 Microcircuits, Digital, Bipolar, Low-Power Schottky Ttl, Cascadable Latches,Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, low-power Schottky TTL, latches. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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Test

Symbol

Conditions

-55°C ≤ TC  ≤ +125°C

Device type

Limits

Unit

Min

Max

Low to high level, from enable input to Q output

tPLH4

CL  = 50 pF ±10%, RL  = 2 kn ±5% VCC  = 5.0 V

01, 04

3

46

ns

High to low level, from enable input to Q output

tPHL4

01, 04

3

26

ns

Low to high level, from

S  input to Q output

tPLH1

02

3

35

ns

High to low level, from

S  input to Q output

tPHL1

02

3

26

ns

High to low level, from

R  input to Q output

tPHL2

02

3

42

ns

High to low level, from clear input to Q output

tPHL1

03

3

42

ns

05

3

30

Low to high level, from data input to Q output

tPLH2

03

3

48

ns

05

3

46

High to low level, from data input to Q output

tPHL2

03

3

34

ns

05

3

33

Low to high level, from address input to Q output

tPLH3

03

3

56

ns

05

3

42

High to low level, from

address input to Q output

tPHL3

03

3

44

ns

05

3

42

Low to high level, from enable input to Q output

tPLH4

03

3

52

ns

05

3

38

High to low level, from enable input to Q output

tPHL4

03, 05

3

38

ns