MIL-M-38510-300 Microcircuits, Digital, Bipolar, Low-Power Schottky, Ttl,And Gates, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, low power, Schottky, TTL, positive NAND logic gate microcircuits.

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Test

Symbol

Conditions

-55°C = TC  = +125°C

Device types

Limits

Unit

Min

Max

High level output voltage

VOH

VCC  = 4.5 V, VIL  = 0.7 V; IOH  = -400 ∝A

01, 03, 05

07, 09

2.5

V

Low level output voltage

VOL

VCC  = 4.5 V, IOL  = 4 mA; VIH  = 2.0 V

All

0.4

V

Input clamp voltage

VIC

VCC  = 4.5 V, IIN  = -18 mA; TC  = +25°C

All

-1.5

V

Collector cut-off current

ICEX

VCC  = 4.5 V, VIL  = 0.7 V; VOH  = 5.5 V

02, 04, 06

08

100

∝A

High level input current

IIH1

VCC  = 5.5 V, VIN  = 2.7 V

All

20

∝A

IIH2

VCC  = 5.5 V, VIN  = 5.5 V

All

100

∝A

Low level input current

IIL

VCC  = 5.5 V, VIL  = 0.4 V

01, 02, 03

04, 05, 06

-30

-400

∝A

07

-30

-380

08

-30

-440

09

0

-400

Short circuit output current

IOS

VCC  = 5.5 V  1/

01, 03, 05

07, 09

-15

-100

mA

High level supply current

ICCH

VCC  = 5.5 V, VIN  = 0 V

01, 02

1.6

mA

03, 04

2.4

05

1.2

06

1.4

07, 08

0.8

09

0.5

Low level supply current

ICCL

VCC  = 5.5 V, VIN  = 5.5 V

01, 02

4.4

mA

03, 04

6.6

05, 06

3.3

07, 08

2.2

09

1.1

Propagation delay time high-to-low level

tPHL

CL  = 50 pF RL  = 2 kν

VCC  = 5.0 V

01, 03, 05,

07

2

24

ns

02, 04, 06,

08

2

55

09

2

38

Propagation delay time low-to-high level

tPLH

CL  = 50 pF RL  = 2 kν

VCC  = 5.0 V

01, 03, 05,

07

2

20

ns

02, 04, 06,

08

2

50

09

2

32