MIL-M-38510/754B
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein.
4.1.1 Burn-in and life test circuits. Burn-in and life test circuits shall be constructed so that the devices are stressed at the maximum operating conditions stated in 4.2c or 4.2d, as applicable, or equivalent as approved by the qualifying activity.
4.2 Screening. Screening shall be in accordance with MIL-PRF-38535 and shall be conducted on all devices prior to qualification and conformance inspection. The following additional criteria shall apply:
a. The burn-in test duration, test condition, and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document control by the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
b. Delete the sequence specified as interim (pre-burn-in) electrical parameters through interim (post-burn-in) electrical parameters of table IA of MIL-PRF-38535 and substitute lines 1 through 7 of table II herein.
c. Unless otherwise specified in the manufacturer's QM plan for static burn-in, test condition A, method 1015 of
MIL-STD-883, test duration for each static test shall be 24 hours minimum for class S devices and in accordance with table I of method 1015 for class B devices.
(1) For static burn-in I, all inputs shall be connected to GND. Outputs may be open or connected to VCC/2 ±0.5 V. Resistors R1 are optional on both inputs and open outputs, and required on outputs connected to VCC/2 ±0.5 V. R1 = 220n to 47 kn.
(2) For static burn-in II, all inputs shall be connected through the R1 resistors to VCC. Outputs may be open or connected to VCC/2 ±0.5 V. Resistors are optional on open outputs, and required on outputs connected to VCC/2 ±0.5 V. R1 = 220n to 47 kn.
(3) VCC = 5.5 V +0.5 V, -0.00 V.
d. Unless otherwise specified in the manufacturer's QM plan for dynamic burn-in, test condition D, method 1015 of
MIL-STD-883, the following shall apply:
(1) Input resistors = 220n to 2 kn ±20 percent. (2) Output resistors = 220n ±20 percent.
(3) VCC = 5.5 V +0.5 V, -0.00 V.
(4) The output enable control pins shall be connected to VCC or GND, as applicable, to enable the outputs.
The latch enable control pins shall be connected to VCC or GND, as applicable, to enable the latch. All
other inputs shall be connected through the resistor to a clock pulse (CP). Outputs shall be connected to
VCC/2 ±0.5 V through the resistors.
(5) CP = 25 kHz to 1 MHz square wave; duty cycle = 50 percent ±15 percent; VIH = 4.5 V to VCC, VIL = 0 V ±0.5 V; tr, tf ≤ 100 ns.
e. Interim and final electrical test parameters shall be as specified in table II.
f. For class S devices, post dynamic burn-in, or class B devices, post static burn-in, electrical parameter measurements may, at the manufacturer's option, be performed separately or included in the final electrical parameter requirements.
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