MIL-M-38510-651 Microcircuits, Digital, High-Speed Cmos, Nor Gates, Monolithic Silicon, Positive LogicThis specification covers the detail requirements for monolithic silicon, high speed CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete Part or Identifying Number PIN. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535 see 6.3.

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MIL-M-38510/651B

TABLE I. Electrical performance characteristics - Continued.

1/ Complete terminal conditions shall be as specified in table III.

2/ Guaranteed but not tested.

3/ Power dissipation capacitance (CPD) per gate.

4/ Tested at VCC = 4.5 V at +125°C for sample testing and VCC = 4.5 V at +25°C for screening.

Guaranteed at other VCC voltages and temperatures. See table IA and exception in 4.4.1d.

5/ For propagation and transition delay times at VCC = 2.0 V, increase limit by a factor of 5.

For propagation and transition delay times at VCC = 6.0 V, decrease limit by a factor of .85.

TABLE IA. Calculated dynamic figures at -55°C or +25°C case temperature. 1/ 2/

VCC

+125°C

-55°C or +25°C

2.0 V

4.5 V

6.0 V

1 →

↓

0.85

5 x 0.75

→ 0.75

↓

0.85 x 0.75

1/ Normalized numbers (+125°C equals 1)

2/ The 2.0 V and 6.0 V numbers are derived from their 4.5 V integer value. Rounding

off according 5/4.