MIL-M-38510-343 Microcircuits, Digital, Bipolar, Advanced Schottky Ttl, Binary Counters, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, advanced Schottky TTL, binary counter microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided or each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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MIL-M-38510/3438

Setup time CEP or CET high to clock pulse

Device types 01, 02 ..........................................................................  13.0 ns minimum

Setup time CEP or CET low to clock pulse

Device types 01, 02 ..........................................................................  7.5 ns minimum

Setup time U / D  high to clock pulse

Device type 03  .................................................................................  12.0 ns minimum

Setup time U / D  low to clock pulse

Device type 03  .................................................................................  12.0 ns minimum

Setup time Pn high to PL

Device types 03, 04 ..........................................................................  6.0 ns minimum

Setup time Pn low to  PL

Device types 03, 04 ..........................................................................  6.0 ns minimum

Setup time  CE  low to clock pulse

Device type 03  .................................................................................  10.5 ns minimum

Hold time Pn high to clock pulse

Device types 01, 02 ..........................................................................  2.5 ns minimum

Hold time Pn low to clock pulse

Device types 01, 02 ..........................................................................  2.5 ns minimum

Hold time  PE  or  SR  high to clock pulse

Device types 01, 02 ..........................................................................  2.0 ns minimum

Hold time  PE  or  SR  low to clock pulse

Device types 01, 02 ..........................................................................  0.0 ns minimum

Hold time CEP or CET high to clock pulse

Device types 01, 02 ..........................................................................  2.0 ns minimum

Hold time CEP or CET low to clock pulse

Device types 01, 02 ..........................................................................  2.0 ns minimum

Hold time Pn low to  PL

Device types 03, 04 ..........................................................................  2.0 ns minimum

Hold time  U / D  high to clock pulse

Device type 03  .................................................................................  0.0 ns minimum

Hold time  U / D  low to clock pulse

Device type 03  .................................................................................  0.0 ns minimum

Hold time  CE  low to clock pulse

Device type 03  .................................................................................  0.0 ns minimum

Recovery time master reset to clock pulse

Device type 01  .................................................................................  6.0 ns minimum

Recovery time  PL  to clock pulse

Device type 03  .................................................................................  7.5 ns minimum

Recovery time master reset to CPU or CPD

Device type 04  .................................................................................  4.5 ns minimum

Recovery time  PL  to CPU or CPD

Device type 04  .................................................................................  8.0 ns minimum

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