MIL-M-38510-308 Microcircuits, Digital, Bipolar, Low-Power Schottky Ttl, Arithmetic Logic Units/Function Generators, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, low-power Schottky TTL, arithmetic logic units/function generators. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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Test

Symbol

Conditions  1/

-55°C ≤ TC  ≤ +125°C

Limits

Unit

Min

Max

Propagation delay times, low to high level output:  5/, 6/

A i or  B i to any  F ,  sum  mode

tPLH1

VCC  = 5.0 V, See figure 4

sum  mode test table

2

55

ns

A i or  B i to any  F ,  diff mode

tPLH2

VCC  = 5.0 V, See figure 4

diff  mode test table

2

55

ns

A i or  B i to any  P ,  sum  mode

tPLH3

VCC  = 5.0 V, See figure 4

sum  mode test table

2

52

ns

A i or  B i to  P ,  diff mode

tPLH4

VCC  = 5.0 V, See figure 4

diff  mode test table

2

52

ns

A i or  B i to  G,  sum  mode

tPLH5

VCC  = 5.0 V, See figure 4

sum  mode test table

2

51

ns

A i or  B i to  G,  diff mode

tPLH6

VCC  = 5.0 V, See figure 4

diff  mode test table

2

55

ns

Cn to any F ,  sum  mode

tPLH7

VCC  = 5.0 V, See figure 4

sum  mode test table

2

46

ns

A i to  B i to A = B,  diff mode

tPLH8

VCC  = 5.0 V, See figure 4

diff  mode test table

2

76

ns

Cn to Cn+4,  sum  mode

tPLH9

VCC  = 5.0 V, See figure 4

sum  mode test table

2

48

ns

Cn to Cn+4,  diff  mode

tPLH10

VCC  = 5.0 V, See figure 4

diff  mode test table

2

48

ns

A i or  B i to Cn+4,  sum  mode

tPLH11

VCC  = 5.0 V, See figure 4

sum  mode test table

2

64

ns

A i or  B i to Cn+4,  diff  mode

tPLH12

VCC  = 5.0 V, See figure 4

diff  mode test table

2

69

ns

A i or  B i to any  F , logic mode

tPLH13

VCC  = 5.0 V, See figure 4

logic mode test table

2

57

ns

1/

Condition of inputs specified in table III.

2/

All unspecified inputs at 5.5 V.

3/

All unspecified inputs at 0 V.

4/

Not more than one output should be shorted at a time.

5/

In  A i and  B i  i = 0, 1, 2, 3.

6/

CL  = 50 pF ±10%, RL  = 2 kn ±5%.

6