MIL-M-38510/307D
TABLE I. Electrical performance characteristics - Continued.
Test |
Symbol |
Conditions -55°C = TC = +125°C unless otherwise specified |
Device types |
Limits |
Unit |
||
Min |
Max |
||||||
Propagation delay time, low to high level through 3 levels of logic (binary select to output) |
tPLH4 |
VCC = 5.0 V CL = 50 pF ±10% |
RL = 2.0 kν ±10% |
01 |
5 |
48 |
ns |
02 |
5 |
51 |
|||||
Propagation delay time, low to high level through 3 levels of logic (A, B, C, or D to output) |
tPLH4 |
03 |
5 |
53 |
ns |
||
Propagation delay time, low to high level through 3 levels of logic (enable to output) |
tPLH5 |
01 |
5 |
47 |
ns |
||
Propagation delay time, high to low level |
tPHL1 |
RL = 665ν ±10% |
04 |
5 |
158 |
ns |
|
Propagation delay time, high to low level through 2 levels of logic (binary select to output) |
tPHL2 |
RL = 2.0 kν ±10% |
01 |
5 |
69 |
ns |
|
02 |
5 |
57 |
|||||
Propagation delay time, high to low level through 2 levels of logic (A, B, C, or D to output) |
tPHL2 |
03 |
5 |
45 |
ns |
||
Propagation delay time, high to low level through 2 levels of logic (enable to output) |
tPHL3 |
01, 02 |
5 |
56 |
ns |
||
Propagation delay time, high to low level through 3 levels of logic (binary select to output) |
tPHL4 |
01 |
5 |
81 |
ns |
||
02 |
5 |
65 |
|||||
Propagation delay time, high to low level through 3 levels of logic (A, B, C, or D to output) |
tPHL4 |
03 |
5 |
53 |
ns |
||
Propagation delay time, high to low level through 3 levels of logic (enable to output) |
tPHL5 |
01 |
5 |
65 |
ns |
1/ IOL = 4 mA for device types 01, 02, and 03; IOL = 12 mA for device type 04.
2/ Not more than one output should be shorted at one time.
5
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