MIL-HDBK-1331 Parameters To Be Controlled For The Specification Of Microcircuits, Handbook ForThis handbook describes the parameters required as a minimum for the specification of microcircuits. Parameters, rather than circuits, are considered because circuits vary with the manufacturers involved. Further, circuit designs should be subject to change if improvement results as long as the affected designs are compatible and fully interchangeable. The specific objectives of this document are as follows: a. To provide the minimum parameters that should be specified to ensure adequate evaluation of circuit design and performance. b. To provide maximum commonality of parameters for purpose of test and measurement, within and between major classes of microcircuit types and to allow the recognition of interface problems between types of microcircuits. c. To provide standard abbreviations, definitions and symbols pertinent to the specification of microcircuits. d. To promote maximum interchangeability and compatibility between microcircuits types.

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MIL-HDBK-1331A

APPENDIX A

A.4.2.19  Minimum and maximum clock-level transition times (tTC).  The shortest and longest transition times of a clock pulse for which stable transition of logic levels, according to the truth table, is guaranteed when the clock goes through its required sequence.

A.4.2.20  Minimum and maximum clock levels, high and low (VCH and VCL).  The lowest and highest magnitudes of clock voltages, for both high and low levels, for which stable transition of logic levels, according to the truth table, is guaranteed when the clock goes through its required sequence at the specified maximum repetition rate.

A.4.2.21  Maximum high-level input voltage (VIH max).  The most positive (least negative) value of high- level input voltage for which operation of the logic element within specification limits is guaranteed.

A.4.2.22  Minimum high-level input voltage (VIH min).  The least positive (most negative) value of high- level input voltage for which operation of the logic element within specification limits is guaranteed.

A.4.2.23  Maximum low-level input voltage (VIL max).  The most positive (least negative) value of low- level input voltage for which operation of the logic element within specification limits is guaranteed.

A.4.2.24  Minimum low-level input voltage (VIL min).  The least positive (most negative) value of low- level input voltage for which operation of the logic element within specification limits is guaranteed.

A.4.2.25  Maximum high-level node input voltage (VINH max).  The most positive (least negative) value

of high-level node voltage for which operation of the logic element within specification limits is guaranteed.

A.4.2.26  Minimum high-level node input voltage (VINH min).  The least positive (most negative) value of high-level node voltage for which operation of the logic element within specification limits is guaranteed.

A.4.2.27  Maximum low-level node input voltage (VINL max).  The  most positive (least negative) value of low-level node voltage for which operation of the logic element within specification limits is guaranteed.

A.4.2.28  Minimum low-level node input voltage (VINL min).  The least positive (most negative) value of low-level node voltage for which operation of the logic element within specification limits is guaranteed.

A.4.2.29  Noise margin (VN).  The voltage amplitude of extraneous signal which can be algebraically added to the noise-free worst-case "input" level before the output voltage deviates from the allowable logic voltage levels.  The term "input" is used here to refer to logic input terminals, power supply terminals, or ground reference terminals.

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