MIL-HDBK-1331 Parameters To Be Controlled For The Specification Of Microcircuits, Handbook ForThis handbook describes the parameters required as a minimum for the specification of microcircuits. Parameters, rather than circuits, are considered because circuits vary with the manufacturers involved. Further, circuit designs should be subject to change if improvement results as long as the affected designs are compatible and fully interchangeable. The specific objectives of this document are as follows: a. To provide the minimum parameters that should be specified to ensure adequate evaluation of circuit design and performance. b. To provide maximum commonality of parameters for purpose of test and measurement, within and between major classes of microcircuit types and to allow the recognition of interface problems between types of microcircuits. c. To provide standard abbreviations, definitions and symbols pertinent to the specification of microcircuits. d. To promote maximum interchangeability and compatibility between microcircuits types.

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MIL-HDBK-1331A

APPENDIX A

A.4  DIGITAL MICROCIRCUITS A.4.1  General terms and definitions.

A.4.1.1  High level.  The level which is the most positive of the two logic levels. A.4.1.2  Low level.  The level which is the most negative of the two logic levels.

A.4.1.3  Negative logic.  The logic is termed negative when logic ZERO state is assigned to the HIGH

level and logic ONE state to the LOW level.

A.4.1.4  Positive logic.  The logic is termed positive when logic ONE state is assigned to the HIGH level and logic ZERO state to the LOW level.

A.4.1.5  Truth table.  A tabulation relating all output logic levels to all possible combinations of input logic levels for sufficient successive time intervals (tn, tn+1) to completely characterize the static and dynamic functions for the logic microcircuit, expressed in logic levels or appropriate symbols.

A.4.2  Letter symbols, terms, and definitions relating to characteristics and operating conditions. A.4.2.1  Minimum asynchronous input pulse width (APW ).  The smallest pulse width for which stable

transition of logic levels, according to the truth table, is guaranteed when the asynchronous inputs are

returned to their noncontrolling levels.

A.4.2.2  Minimum clock pulse width (CPW ).  The smallest pulse width for which stable transition of logic levels, according to the truth table, is guaranteed when the clock goes through the required sequence.

A.4.2.3  Minimum and maximum clock repetition rates (CRR).  The current flowing into * a supply terminal of a microcircuit when all the outputs are at a high-level voltage.

A.4.2.5  Low-level supply current (ICCL, IDDL, IEEL, etc).  The current flowing into * a supply terminal of a microcircuit when all the outputs are at a low-level voltage.

A.4.2.6  Maximum collector cut-off current (ICEX).  The maximum forced current measured at the collector of an output transistor without a current source (pull-up) that will produce a specified high-level output voltage.

A.4.2.7  High-level input current (IIH).  The current flowing into * an input when a specified high-level is applied to that input.

A.4.2.8  Low-level input current (IIL).  The current flowing into * an input when a specified low-level is applied to that input.

*Current flowing out of a terminal may be considered as a negative quantity.

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