MIL-M-38510-40 Microcircuits, Digital, Ttl, High Speed, And-Or-Invert Gates, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, TTL, HIGH-SPEED, and-or-invert logic gating microcircuits. One product assurance class and a choice and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number.

Pages 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 10 - 11 - 12 - 13 - 14 - 15 - 16 - 17 - 18 - 19 - 20 - 21 - 22 - 23 - 24 - 25

Test

Symbol

Conditions

-55°C ≤ TC  ≤ +125°C

unless otherwise specified

Device type

Limits

Unit

Min

Max

High level output voltage

VOH

VCC = 4.5 V, VIN = 0.8 V, IOH = -500 µA  1/

All

2.4

V

Low level output voltage

VOL

VCC = 4.5 V, IOL = 20 mA, VIN = 2.0 V for all inputs of gate under test

All

0.4

V

Input clamp voltage

VIC

VCC = 4.5 V, IIN = -12 mA, TC = +25°C

All

-1.5

V

High level input current

IIH1

VCC = 5.5 V, VIN = 2.4 V

2/

All

50

µA

IIH2

VCC = 5.5 V, VIN = 5.5 V

2/

All

100

µA

Low level input current

IIL

VCC = 5.5 V, VIN = 0.4 V

1/

All

-1.0

-2.0

mA

Short circuit output current

IOS

VCC = 5.5 V 2/,  3/

All

-40

-100

mA

High level supply current

ICCH

VCC = 5.5 V, VIN = 0 V  2/

01, 02

13

mA

03, 04

11

05

6.4

Low level supply current

ICCL

VCC = 5.5 V, VIN = 5.5 V  1/

01, 02

24

mA

03, 04

14

05

12

Expander input current

IX

VCC = 4.5 V, VIN = 1.4 V

01, 03,

05

-5.85

mA

Base emitter voltage of output transistor

VBE

VCC = 4.5 V, IOL = 20 mA, IX = 700 µA

01, 03,

05

1.1

V

Propagation delay time, high to low level expander pins open

tPHL1

CL = 50 pF, RL = 280 n

All

2

18

ns

Propagation delay time, low to high level expander pins open

tPLH1

CL = 50 pF, RL = 280 n

All

2

18

ns

Propagation delay time, high to low level

tPHL2

CL = 50 pF, RL = 280 n

C X   = 15 pF

01, 03,

05

2

22

ns

Propagation delay time, low to high level

tPLH2

CL = 50 pF, RL = 280 n

C X   = 15 pF

01, 03,

05

2

26

ns