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MIL-M-38510-324 Microcircuits, Digital, Bipolar, Low-Power Schottky Ttl, Octal Buffer Gates With Three State Outputs, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, low-power Schottky TTL, octal bus buffer gates with three state outputs. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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TABLE III.  Group A inspection for device type 02 and 03 - Continued. Terminal conditions (pins not designated may be high � 2.0 V; low s 0.7 V; or open).


1/  For type 02, pin 19 is 2G; for type 03, pin 19 is 2 G .

2/  Apply 2.0 V for type 02; apply 0.7 V for type 03.

3/  Apply 2.0 V for type 02; apply 0.5 V for type 03.

4/  Apply 0.7 V for type 02; apply 2.0 V for type 03.

5/  IIL  limits shall be as follows:



Test

Min/max limits (µA) for circuit

A

B

C

D

E

F

G

IIL

0/-200

0/-150

0/-150

0/-150

0/-200

-5/-200

0/-150


6/  Apply 5.5 V for type 02; apply GND for type 03.

7/  Apply GND for type 02; apply 5.5 V for type 03.

8/  A = 3.0 V min;  B = 0.0 V or GND.

9/  Apply A for type 02; apply B for type 03.

10/  H > 1.5 V; L < 1.5 V.




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