MIL-M-38510-324 Microcircuits, Digital, Bipolar, Low-Power Schottky Ttl, Octal Buffer Gates With Three State Outputs, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, low-power Schottky TTL, octal bus buffer gates with three state outputs. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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MIL-M-38510/3240

TEST CIRCUIT

NOTES:

1. CL = 50 pF ±10%. CL includes probe and jig capacitance.

2. All diodes are 1N3064 or equivalent.

3. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by

the output control.

4. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily.

5. All input pulses are supplied by generators having the following characteristics: PRR � 1 MHz,

tP = 500 ns, ZOUT ≈ 50 ohms, VGEN = 3.0 V, tTLH � 15 ns and tTHL � 6 ns between 0.7 V and 2.7 V.

6. The diode and resistor shown within the dotted area are optional. When the diode and resistor are used, VBIAS

shall be 5.5 V for all tests except for tPHZ, for tPHZ tests, VBIAS shall be -0.6V.

FIGURE 4. Switching time test circuit and waveforms for device types 01, 02, 03, 04 and 05.