MIL-M-38510/320D
TABLE I. Electrical performance characteristics.
Test |
Symbol |
Conditions -55°C ≤ TC ≤ +125°C unless otherwise specified |
Device types |
Limits |
Unit |
|
Min |
Max |
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Low level input current at CP1 |
IIL6 |
VCC = 5.5 V, VIN = 0.4 V |
01 |
-0.4 |
-3.2 |
mA |
02 |
-0.4 |
-1.6 |
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Short circuit output current |
IOS |
VCC = 5.5 V 2/ |
01, 02 |
-15 |
-100 |
mA |
03, 04 |
-15 |
-130 |
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Supply current |
ICC |
VCC = 5.5 V, VIN = 0 V 3/ |
01, 02 |
27 |
mA |
|
03, 04 |
15 |
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Maximum count frequency at input CPo |
fMAX |
VCC = 4.5 V, CL = 50 pF ±10% RL = 2 kn |
01, 02 |
30 |
MHz |
|
Maximum count frequency at input CP1 |
fMAX |
01, 02 |
15 |
MHz |
||
Maximum input A count frequency |
fMAX |
VCC = 5.0 V, CL = 50 pF ±10%, RL = 2 kn |
03, 04 |
29 |
MHz |
|
Propagation delay time low to high, A to QC |
tPLH1 4/ |
03, 04 |
3 |
74 |
ns |
|
Propagation delay time high to low, A to QC |
tPHL1 4/ |
03, 04 |
3 |
81 |
ns |
|
Propagation delay time low to high, B to QD |
tPLH2 |
03 |
3 |
52 |
ns |
|
04 |
3 |
78 |
||||
Propagation delay time high to low, B to QD |
tPHL2 |
03 |
3 |
56 |
ns |
|
04 |
3 |
78 |
||||
Propagation delay time low to high, CPo to Q2 |
tPLH3 5/ |
01, 02 |
3 |
100 |
ns |
|
Propagation delay time high to low, CPo to Q2 |
tPHL3 5/ |
01, 02 |
3 |
107 |
ns |
|
Propagation delay time low to high, CP1 to Q3 |
tPLH4 |
01 |
3 |
38 |
ns |
|
02 |
3 |
78 |
||||
Propagation delay time high to low, CP1 to Q3 |
tPHL4 |
01 |
3 |
52 |
ns |
|
02 |
3 |
110 |
||||
Propagation delay time low to high, load to Q |
tPLH5 |
01, 02 |
3 |
46 |
ns |
|
Propagation delay time high to low, load to Q |
tPHL5 |
01, 02 |
3 |
65 |
ns |
|
Propagation delay time high to low, reset to Q |
tPHL6 |
02 |
3 |
46 |
ns |
1/ Input B ( CP1 ) is connected to QA (Q0) during the VOL test.
2/ Not more than one output should be shorted at a time.
3/ ICC is measured with all outputs open, both Ro inputs grounded following momentary connection to 4.5 V and all other inputs grounded.
4/ When testing tPHL1 or tPLH1, the QA pin shall be connected to the input B pin.
5/ When testing tPHL3 or tPLH3, the Q0 pin shall be connected to the CP1 pin.
6
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