MIL-M-38510-311 Microcircuits, Digital, Bipolar, Low Power Schottky Ttl, Magnitude Comparators, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, low-power Schottky TTL, magnitude comparator microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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MIL-M-38510/311C

TABLE I. Electrical performance characteristics - Continued.

Test	Symbol	Conditions -55°C = TC = +125°C	Limits		Unit
Test	Symbol	Conditions -55°C = TC = +125°C	Min	Max	Unit
Propagation delay from any A or B input to A > B or A < B outputs	tPHL1	CL = 50 pF ±10%, 3 gate levels 4/, 5/ RL = 2 kν	2	42	ns
Propagation delay from any A or B input to A = B output	tPHL2	CL = 50 pF ±10%, 3 gate levels 4/, 5/ RL = 2 kν	2	39	ns
Propagation delay from A < B or A = B inputs to A > B output	tPHL3	CL = 50 pF ±10%, 2 gate levels 4/, 5/ RL = 2 kν	2	28	ns
Propagation delay from A = B input to A = B output	tPHL4	CL = 50 pF ±10%, 1 gate level 4/, 5/ RL = 2 kν	2	36	ns
Propagation delay from A > B or A = B input to A < B output	tPHL5	CL = 50 pF ±10%, 2 gate levels 4/, 5/ RL = 2 kν	2	26	ns

1/ All unspecified inputs grounded.

2/ Not more than one output should be shorted at one time.

3/ ICC is measured with outputs open, A = B grounded, and all other inputs at 4.5 V.

4/ The longest gate level propagation delay paths are not tested (5 gate levels); however, they can be calculated:

t = tP1 maximum + tP2 maximum - tP4 minimum.

5/ Gate level references are made with respect to the logic diagram.