MIL-M-38510-23 Microcircuits, Digital, Ttl, High Speed, Nand Gates Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, TTL, high speed, positive NAND logic gating microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3

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Test

Symbol

Conditions

-55°C ≤ TA ≤ +125°C

0evice type

Limits

Units

Min

Max

High-level output

voltage

VOH

VCC = 4.5 V, VIN = 0.8 V,           11

IOH = -500 µA

01,02,03,

04,05

2.4

V

Low-level output voltage

VOL

VCC = 4.5 V, IOL = 20 mA,           11

VIN = 2.0 V for all inputs of gate under test

01-07

0.4

V

Input clamp voltage

VIC

VCC = 4.5 V, IIN = -12 mA, TA = +25°C

01-07

-1.5

V

Maximum collector

cut-off-current

ICEX

VOH = 5.5 V,

VCC = 4.5 V, VIN = 0.8 V

06,07

250

µA

High-level input

current

IIH1

VCC = 5.5 V, VIN = 2.4 V          21

01-07

50

µA

High-level input

current

IIH2

VCC = 5.5 V, VIN = 5.5 V          21

01-07

100

µA

Low-level input

current

IIL

VCC = 5.5 V, VIN = 0.4 V           11

01-07

-1.0

-2.0

mA

Short-circuit output

current

IOS

VCC = 5.5 V                           21 31

01,02,03,

04,05

-40

-100

mA

High-level supply

current per gate

ICCH

VCC = 5.5 V, VIN = 0 V              21

01-07

4.2

mA

Low-level supply

current per gate

ICCL

VCC = 5.5 V,                              11

VIN = 5.5 V

01-07

10

mA

Propagation delay time high-to-low level

tPHL

CL = 50 pF, RL = 280 n

01,

2

18

ns

02,03,

04,05

2

16

06,07

3

18

Propagation delay time low-to-high level

tPLH

CL = 50 pF, RL = 280 n

01

2

16

ns

02,03,

04,05

2

15

06,07

3

21