MIL-M-38510-139 Microcircuits, Linear, Internally Trimmed Analog Multiplier, Hybrid And Monolithic SiliconThis specification covers the detail requirements for monolithic and hybrid silicon, internally trimmed analog multipliers. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3

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MIL-M-38510f139C

TABLE I. Electrical performance characteristics - Continued.

Test	Symbol	Conditions VS = ±15 V, RL = 2 kn, Paragraph 3.5 and figure 2 unless otherwise specified	Device type	Limits		Unit
				Min	Max
Multiplier accuracy drift	MAxyfoT	Vx = ±10 V, Vy = ±10 V, -55°C ≤ TA ≤ 125°C	01	-0.01	0.01	%FSf°C
			02	-0.02	0.02
Output offset voltage	VOIO	Vx = Vy = Vz = 0, TA = 25°C	01	-15.0	15.0	mV
			02	-30.0	30.0
		Vx = Vy = Vz = 0, TA = -55°C	01	-39.0	39.0
			02	-70.0	70.0
		Vx = Vy = Vz = 0, TA = 125°C	01	-45.0	45.0
			02	-80.0	80.0
Output offset voltage drift	VOIOfoT	oTA from -55°C to 25°C, oTA from 25°C to 125°C	01	-300.0	300.0	µVf°C
			02	-500.0	500.0
Offset voltage (x)	VIO(x)	TA = 25°C	01	-10.0	10.0	mV
			02	-20.0	20.0
		TA = -55°C	01	-22.0	22.0
			02	-36.0	36.0
		TA = 125°C	01	-25.0	25.0
			02	-40.0	40.0
Output offset voltage drift (x)	VOIO(x)foT	oTA from -55°C to 25°C, oTA from 25°C to 125°C	01	-150.0	150.0	µVf°C
			02	-200.0	200.0
Offset voltage (y)	VIO(y)	TA = 25°C	01	-10.0	10.0	mV
			02	-20.0	20.0
		TA = -55°C	01	-22.0	22.0
			02	-36.0	36.0
		TA = 125°C	01	-25.0	25.0
			02	-40.0	40.0
Offset voltage drift (y)	VIO(y)foT	oTA from -55°C to 25°C, oTA from 25°C to 125°C	01	-150.0	150.0	µVf°C
			02	-200.0	200.0
Offset voltage (z)	VIO(z)	TA = 25°C	01	-15.0	15.0	mV
			02	-30.0	30.0
		TA = -55°C	01	-39.0	39.0
			02	-70.0	70.0
		TA = 125°C	01	-45.0	45.0
			02	-80.0	80.0
Offset voltage drift (z)	VIO(z)foT	oTA from -55°C to 25°C, oTA from 25°C to 125°C	01	-300.0	300.0	µVf°C
			02	-500.0	500.0