MIL-M-38510-78 Microcircuits, Digital, Schottky Ttl, Arithmetic Logic Unit / Function Generators, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, Schottky TTL, arithmetic logic unit / function generators. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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Test

Symbol

Conditions   1/

-55°C ≤ TC ≤ +125°C Unless Otherwise Specified

Device type

Limits

Unit

Min

Max

Propagation delay times, low to high level output:  9/

Ai or Bi to P

diff mode

tPLH4

VCC = 5.0 V  See figure 4 diff mode test table

01

2

20

ns

Ai or Bi to G

sum mode

tPLH5

VCC = 5.0 V  See figure 4 sum mode test table

01

2

16

ns

Ai or Bi to G

diff mode

tPLH6

VCC = 5.0 V  See figure 4 diff mode test table

01

2

20

ns

Cn to any F

sum mode

tPLH7

VCC = 5.0 V  See figure 4 sum mode test table

01

2

16

ns

Ai or Bi to A = B

diff mode

tPLH8

VCC = 5.0 V  See figure 4 diff mode test table

01

2

29

ns

Cn to Cn+4

sum mode

tPLH9

VCC = 5.0 V  See figure 4 sum mode test table

01

2

14.5

ns

Cn to Cn+4

diff mode

tPLH10

VCC = 5.0 V  See figure 4 diff mode test table

01

2

14.5

ns

Ai or Bi to Cn+4

sum mode

tPLH11

VCC = 5.0 V  See figure 4 sum mode test table

01

2

25

ns

Ai or Bi to Cn+4

diff mode

tPLH12

VCC = 5.0 V  See figure 4 diff mode test table

01

2

29

ns

Ai or Bi to any F

logic mode

tPLH13

VCC = 5.0 V  See figure 4 logic mode test table

01

2

26

ns

Propagation delay times, high to low level output:   10/

Cn to Cn+x, Cn+y, Cn+z

tPHL1

VCC = 5.0 V; P0, P1, P2

= GND, Gi = 2.7 V

02

2

14.5

ns

P0, P1, or P2, to

Cn+x, Cn+y, Cn+z

tPHL2

VCC = 5.0 V; P0, P1, P2

= GND; Cn,  Gi = 2.7 V

02

2

11

ns

G0, G1, or G2 to

Cn+y, Cn+x, Cn+z

tPHL3

VCC = 5.0 V; Cn, P0, P1, P2 = GND, Gi = 2.7 V  11/

02

2

11

ns