MIL-M-38510-383 Microcircuits, Digital, Bipolar, Advanced Low Power Schottky Ttl, Octal Buffer Gates With Three State Outputs, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, TTL, advanced low power Schottky, octal bus buffer gates with three state outputs. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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TABLE III. Group A inspection for device type 01.

Terminal conditions (pins not designated may be high � 2.0 V; low s 0.8 V; or open).

1/ IIL limits shall be as follows:

Test	Min/Max limits in µA for circuit
Test	A	B	C
IIL	0/-100	0/-100	0/-100

2/ Method 3011 shall be used, except the output voltage shall be as specified herein, and the output current shall be operating rather than short circuit current. The output conditions have been chosen to produce a current that closely approximates one-half of the true short circuit output current IOS.

3/ IO limits shall be -20 mA min/-112 mA max for circuit A and -30 mA min/-110 mA max for circuit C.

4/ A � 2.0 V and B s 0.8 V.

5/ Output voltages shall be either:

a. H = 2.4 V minimum and L = 0.4 V maximum when using a high speed checker double comparator, or b. H � 1.5 V and L s 1.5 V when using a high speed checker single comparator.