MIL-M-38510-336 Microcircuits, Digital, Bipolar, Advanced Schottky Ttl, Shift Registers, Cascadable, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, advanced Schottky TTL, shift register microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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MIL-M-38510/3368

1.3 Absolute maximum ratings.

Supply voltage range ............................................................................. -0.5 V dc to +7.0 V dc

Input voltage range ................................................................................ -1.2 V dc at -18 mA to +7.0 V dc

Storage temperature range .................................................................... -65° to +150°C Maximum power dissipation, per device (PD) 1/ .................................... 253 mW

Lead temperature (soldering, 10 seconds) ............................................. +300°C Thermal resistance, junction to case (eJC):

Cases E, F, X, and 2 ............................................................................ (See MIL-STD-1835)

Junction temperature (TJ) 2/ ................................................................... 175°C

1.4 Recommended operating conditions.

Supply voltage (VCC) .............................................................................. 4.5 V minimum to 5.5 V maximum

Minimum high level input voltage (VIH) ................................................... 2.0 V dc Maximum low level input voltage (VIL) .................................................... 0.8 V dc Width of clock pulse low

tPW(CPL) .............................................................................................. 6.0 ns minimum

Width of clock pulse high

tPW(CPH) .............................................................................................. 6.0 ns minimum

Width of master reset pulse low

tPW(MRL) .............................................................................................. 5.0 ns minimum

Setup time data high to clock pulse

tSD(H) ................................................................................................. 6.0 ns minimum

Setup time data low to clock pulse

tSD(L) .................................................................................................. 4.0 ns minimum

Hold time data high to clock pulse

tHD(H) ................................................................................................. 2.0 ns minimum

Hold time data low to clock pulse

tHD(L) .................................................................................................. 1.0 ns minimum

Setup time select high to clock pulse

tSS(H) .................................................................................................. 10.5 ns minimum

Setup time select low to clock pulse

tSS(L) .................................................................................................. 8.0 ns minimum

Hold time select high to clock pulse

tHS(H) ................................................................................................. 0.0 ns minimum

Hold time select low to clock pulse

tHS(L) .................................................................................................. 0.0 ns minimum

Recovery time master reset to clock pulse

tREC( MR /CP) ........................................................................................ 9.0 ns minmum

Input clock frequency

f(CLOCK) .............................................................................................. 0 - 80 MHz

Case operating temperature range (TC) ................................................. -55° to +125°C

1/ Must withstand the added PD due to short-circuit test (e.g., IOS).

2/ Maximum junction temperature shall not be exceeded except in accordance with allowable short

duration burn-in screening condition in accordance with MIL-PRF-38535.