MIL-M-38510-153 Microcircuits, Digital, Ttl, Quadruple Bus Buffer Gates With Three-State Outputs, Monolithic SiliconThis specification covers the detail requirements for monolithic silicon, TTL, quadruple bus buffer gates with three-state outputs. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.3.

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Test

Symbol

Conditions

-55qC ≤ TC ≤ +125qC

Device type

Limits

Unit

Min

Max

Input clamp voltage

VIC

VCC = 4.5 V, IIN = -12 mA

01,02

-1.5

V

High level output voltage

VOH

VCC = 4.5 V, IOH = -2 mA

01,02

2.4

V

Low level output voltage

VOL

VCC = 4.5 V, IOL = 16 mA

01,02

0.4

V

Off-state (high-impedance state) output current

IO(off)1

VCC = 5.5 V, VOH = 2.4 V

01,02

40

µA

Off-state (high-impedance state) output current

IO(off)2

VCC = 5.5 V, VOL = 0.4 V

01,02

-40

µA

Input current at maximum input voltage

IIH1

VCC = 5.5 V, VIH = 5.5 V

01,02

100

µA

Input current at minimum input voltage

IIH2

VCC = 5.5 V, VIH = 5.5 V

01,02

100

µA

High level input current

IIH3

VCC = 5.5 V, VIH = 2.4 V

01,02

40

µA

Low level input current

IIL

VCC = 5.5 V, VIL = 0.4 V

01,02

-0.7

-1.6

mA

Supply current

ICC

VCC = 5.5 V, data inputs = 0 V, output controls = 4.5 V

01

54

mA

VCC = 5.5 V, data inputs = 0 V, output controls = 0 V

02

62

Short circuit output           1/

current

IOS

VCC = 5.5 V

01,02

-30

-70

mA

Propagation delay time

(high to low level)

tPHL

CL = 50 pF  ±10 %, VCC = 5.0 V

01,02

2

22

ns

Propagation delay time

(low to high level)

tPLH

CL = 50 pF  ±10 %, VCC = 5.0 V

01,02

2

16

ns

Output enable time

to high level

tPZH

VCC = 5.0 V,

CL = 50 pF  ±10 %

01

2

20

ns

02

2

22

Output enable time

to low level

tPZL

VCC = 5.0 V,

CL = 50 pF  ±10 %

01,02

2

30

ns

Output disable time

from high level

tPHZ

VCC = 5.0 V,

CL = 50 pF  ±10 %

01

2

21

ns

02

2

31

Output disable time

from low level

tPLZ

VCC = 5.0 V,

CL = 50 pF  ±10 %

01

2

20

ns

02

2

27