MIL-M-38510-76 Microcircuits, Digital, Bipolar Schottky Ttl, Cascadable, Shift Registers, Monolithic SiliconThis specification covers the detail requirements for monolithic, silicon, Schottky TTL, shift register microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided for each type and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, see 6.4.

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MIL-M-38510/76C

TABLE I. Electrical performance characteristics.

Test	Symbol	Conditions -55°C ≤ TC ≤ +125°C unless otherwise specified	Device type	Limits		Units
Test	Symbol	Conditions -55°C ≤ TC ≤ +125°C unless otherwise specified	Device type	Min	Max	Units
High level output voltage	VOH	VCC = 4.5 V, VIH = 2.0 V, VIL = 0.8 V, IOH = -1 mA	01, 02	2.5		V
High level output voltage	VOH	TC = +125°C, VIL = 0.7 V	02	2.5		V
Low level output voltage	VOL	VCC = 4.5 V, VIH = 2.0 V, VIL = 0.8 V, IOL = 20 mA	01, 02		0.5	V
Low level output voltage	VOL	TC = +125°C, VIL = 0.7 V	01, 02		0.45	V
Input clamp voltage	VIC	VCC = 4.5 V, IIN = -18 mA, TC = 25°C	01, 02		-1.2	V
High level input current, all inputs	IIH1	VCC = 5.5 V, VIN = 2.7 V	01, 02		50	µA
High level input current, all inputs	IIH2	VCC = 5.5 V, VIN = 5.5 V	01, 02		1	mA
Low level input current, all inputs	IIL	VCC = 5.5 V, VIN = 0.5 V	01, 02	-0.5	-2	mA
Short-circuit output current	IOS	VCC = 5.5 V 1/	01, 02	-40	-100	mA
Supply current	ICC	VCC = 5.5 V 2/	01, 02		130	mA
Collector cut-off current	ICEX	VCC = 5.5 V, VIH = 5.5 V, VOH = 5.5 V	01, 02		250	µA
Maximum clock frequency	fMAX	VCC = 5.0 V, CL = 50 pF, RL = 2800 (See figure 4)	01	70		MHz
Propagation delay time, high-to-low level output from clear	tPHL1			4	28	ns
Propagation delay time, low-to-high level output from clock	tPLH2			4	19	ns
Propagation delay time, high-to-low level output from clock	tPHL2			4	25	ns
Maximum clock frequency	fMAX	VCC = 5.0 V, CL = 50 pF, RL = 2800 (See figure 5)	02	70		MHz
Propagation delay time, high-to-low level output from clear	tPHL1			4	28	ns
Propagation delay time, low-to-high level output from clock	tPLH2			4	19	ns
Propagation delay time, high-to-low level output from clock	tPHL2			4	25	ns

1/ Not more than one output should be shorted at a time.

2/ Device type:

01 - With all outputs open, inputs A thru D grounded, 5.5 V applied to S0, S1, clear, and the serial inputs, ICC is tested by applying clock pulse.

02 - With the outputs open, clear at 4.5 V, shift load, J, K , and data inputs grounded, ICC is measured by applying clock pulse.