MIL-M-38510/82C
TABLE I. Electrical performance characteristics - Continued.
|
Test |
Symbol |
Conditions -55qC ≤ TC ≤ +125qC Unless Otherwise Specified |
Limits |
Unit |
|
|
Min |
Max |
||||
|
Propagation delay from A < B or A = B input to A > B output |
tPLH3 |
CL = 50 pF ± 10%, 2 gate levels RL = 280 0 4/ 5/ |
2 |
11.5 |
ns |
|
Propagation delay from A = B input to A = B output |
tPLH4 |
CL = 50 pF ± 10%, 1 gate level RL = 280 0 4/ 5/ |
2 |
16 |
ns |
|
Propagation delay from A > B or A = B input to A < B output |
tPLH5 |
CL = 50 pF ± 10%, 2 gate levels RL = 280 0 4/ 5/ |
2 |
11.5 |
ns |
|
Propagation delay from any A or B input to A > B or A < B output |
tPHL1 |
CL = 50 pF ± 10%, 3 gate levels RL = 280 0 4/ 5/ |
2 |
24 |
ns |
|
Propagation delay from any A or B input to A = B output |
tPHL2 |
CL = 50 pF ± 10%, 3 gate levels RL = 280 0 4/ 5/ |
2 |
24 |
ns |
|
Propagation delay from A < B or A = B inputs to A > B output |
tPHL3 |
CL = 50 pF ± 10%, 2 gate levels RL = 280 0 4/ 5/ |
2 |
13 |
ns |
|
Propagation delay from A = B input to A = B output |
tPHL4 |
CL = 50 pF ± 10%, 1 gate level RL = 280 0 4/ 5/ |
2 |
12 |
ns |
|
Propagation delay from A > B or A = B input to A < B output |
tPHL5 |
CL = 50 pF ± 10%, 2 gate levels RL = 280 0 4/ 5/ |
2 |
13 |
ns |
1/ All unspecified inputs grounded.
2/ Not more than one output should be shorted at a time.
3/ ICC is measured with outputs open, A = B grounded, and all other inputs at 4.5 V.
4/ The longest gate level propagation delay paths are not tested (5 gate levels); however, they can be calculated: t = tP1 maximum + tP2 maximum - tP4 minimum.
5/ Gate level references are made with respect to the circuit logic diagram.
5
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