MIL-M-38510/361B
TABLE I. Electrical performance characteristics.
Test |
Symbol |
Conditions -55°C ≤ TC ≤ +125°C unless otherwise specified |
Device type |
Limits |
Unit |
|
Min |
Max |
|||||
High level output voltage |
VOH |
VCC = 4.5 V, IOH = -1 mA, VIH = 2.0 V, VIL = 0.7 V |
01 |
2.4 |
V |
|
Low level output voltage |
VOL |
VCC = 4.5 V, IOL = 12 mA VIH = 2.0 V, VIL = 0.7 V |
01 |
0.4 |
V |
|
Input clamp voltage |
VI C |
VCC = 4.5 V, IIN = -18 mA, TC = 25°C |
01 |
-1.5 |
V |
|
Low level input current |
IIL |
VCC = 5.5 V, VIN = 0.4 V |
01 |
-30 |
-380 |
µA |
High level input current |
IIH1 |
VCC = 5.5 V, VIN = 2.7 V |
01 |
20 |
µA |
|
IIH2 |
VCC = 5.5 V, VIN = 5.5 V |
01 |
100 |
µA |
||
Low level output current outputs off |
IOZL |
VCC = 5.5 V, VI = 2.0 V, VO = 0.4 V |
01 |
-20 |
µA |
|
High level output current outputs off |
IOZH |
VCC = 5.5 V, VI = 0.7 V, VO = 2.7 V |
01 |
20 |
µA |
|
Short circuit output current |
IOS |
VCC = 5.5 V 1/ |
01 |
-30 |
-130 |
mA |
Supply current |
ICC |
VCC = 5.5 V 2/ |
01 |
30 |
mA |
|
Maximum input clock frequency |
fMAX |
VCC = 5.5 V RL = 110n CL = 50 pF |
01 |
20 |
MHz |
|
Propagation delay time, high to low level, clear to output |
tPHL1 |
01 |
7 |
46 |
ns |
|
Propagation delay time, low to high level, clock to output |
tPLH2 |
01 |
7 |
33 |
ns |
|
Propagation delay time, high to low level, clock to output |
tPHL2 |
01 |
7 |
39 |
ns |
|
Propagation delay time, disable to high level |
tPZH |
01 |
2 |
34 |
ns |
|
Propagation delay time, disable to low level |
tPZL |
01 |
2 |
35 |
ns |
|
Propagation delay time, high level to disable |
tPHZ |
01 |
2 |
29 |
ns |
|
Propagation delay time, low level to disable |
tPLZ |
01 |
2 |
29 |
ns |
1/ Not more than one output should be shorted at a time.
2/ ICC is measured with all outputs open; clear grounded following momentary connection to 4.5V; N, G1, G2 and all data inputs grounded; and the clock input and M at 4.5 V.
5
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